Design of a Class F Power Amplifier With 60% Efficiency at 1800 MHz Frequency
Abstract
Based on the portable systems application, it is necessary to design blocks with high efficiency to increase battery lifetime. Power amplifier is the highest power consumption block in transmitter. The proposed circuit was simulated using ADS Agilent based on 0.18 μm TSMC RF CMOS technology and supply voltage of 3.3V on transistor level. The proposed power amplifier was designed by Class F type at 1800 MHz with 60% efficiency and output powers of 30 dBm.
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PDFDOI: https://doi.org/10.11591/eei.v4i4.515
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Bulletin of Electrical Engineering and Informatics (BEEI)
ISSN: 2089-3191
,
e-ISSN: 2302-9285
This journal is published by the
Institute of Advanced Engineering and Science (IAES)
.